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Changes required for SDK 0.18 for testing using SDK 0.17 #93042

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This is the collab-sdk-dev series rebased to a recent main revision and then adapted so that it "should" build using SDK 0.17.

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github-actions bot commented Jul 11, 2025

The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff
cmsis-dsp zephyrproject-rtos/cmsis-dsp@d80a49b zephyrproject-rtos/cmsis-dsp#7 zephyrproject-rtos/cmsis-dsp#7/files
hal_silabs zephyrproject-rtos/hal_silabs@190a144 zephyrproject-rtos/hal_silabs@95e9574 zephyrproject-rtos/[email protected]
mbedtls zephyrproject-rtos/mbedtls@85440ef (zephyr) zephyrproject-rtos/mbedtls#73 zephyrproject-rtos/mbedtls#73/files
psa-arch-tests zephyrproject-rtos/psa-arch-tests@2cadb02 (main) zephyrproject-rtos/psa-arch-tests#14 zephyrproject-rtos/psa-arch-tests#14/files

DNM label due to: 3 projects with PR revision

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@keith-packard keith-packard force-pushed the collab-sdk-dev branch 3 times, most recently from 2db5239 to 0ee55f3 Compare July 11, 2025 20:03
@keith-packard keith-packard force-pushed the collab-sdk-dev branch 3 times, most recently from 763b2da to d64055d Compare July 12, 2025 02:57
Disable the default startup file with -nostartfiles.

Signed-off-by: Keith Packard <[email protected]>
When the target has only a single CPU, this function cannot ever
succeed. Skip all of the drama and just return -EINVAL. This makes GCC 14
happy as it doesn't get confused about possible out of bounds access of the
soc_cpus_active array.

Signed-off-by: Keith Packard <[email protected]>
The stm32u3x header files defines LL_ADC_SINGLE_ENDED but not
LL_ADC_DIFFERENTIAL as the device doesn't support differential mode. The
driver only checked for LL_ADC_SINGLE_ENDED and assumed that when that was
defined, LL_ADC_DIFFERENTIAL would also be defined.

Check for both when figuring out which calibration type will be required.

Signed-off-by: Keith Packard <[email protected]>
Zephyr replaces the toolchain version of stdint.h to define uint32_t and
int32_t as int rather than long. This breaks the ARM MVE intrinics which
require uint32_t to be defined as unsigned long.

Define 'ZEPHYR_USE_TOOLCHAIN_STDINT_H_' as that causes zephyr_stdint.h to
be skipped, ensuring that the normal stdint.h types are used instead.

Signed-off-by: Keith Packard <[email protected]>
psa-arch-tests includes device drivers that failed to mark
registers with 'volatile'. GCC 14.3 cleverly optimized
sequential register accesses using strd/ldrd instructions which
caused the drivers to fail.

Signed-off-by: Keith Packard <[email protected]>
GCC 14.3 will happily delete any code that appears before
__builtin_unreachable that isn't separated with an obvious branch. That
includes __asm__ statements, even those which generate traps.

The failure case that I debugged was on x86 in
z_check_stack_sentinel. There is a store to restore the sentinel to the
correct value just before the ARCH_EXCEPT, and that macro emits 'int $32'
followed by CODE_UNREACHABLE. Because the compiler didn't understand that
ARCH_EXCEPT was changing execution flow, it decided that the sentinel
restoring store 'couldn't' be reached and elided it.

I added the compiler barrier to CODE_UNREACHABLE as that construct is
required for this problem to occur, but a more surgical fix might be to add
:"memory" to the relevant __asm__ statements. Finding and fixing all of
those now and forever seems like it would be too burdensome to be worth any
possible code improvement.

Signed-off-by: Keith Packard <[email protected]>
Move the manifest rev to make this module compatible with either cmsis-5 or
cmsis-6 by adapting to the CMSIS version when accessing NVIC and SCB
registers.

Signed-off-by: Keith Packard <[email protected]>
This patch (submitted upstream) avoids an incorrect warning generated by
gcc 14.3 about array bounds. It should not change the generated code at
all.

Signed-off-by: Keith Packard <[email protected]>
Signed-off-by: Anas Nashif <[email protected]>
GCC version 14.3 does more extensive checking for potentially uninitialized
values and warns about a couple of arrays. Initialize them to zero to make
the compiler happy.

Signed-off-by: Keith Packard <[email protected]>
This PR changes some explicit negative right shifts into positive left
shifts as required by GCC 14.

Signed-off-by: Keith Packard <[email protected]>
@keith-packard keith-packard force-pushed the collab-sdk-dev branch 2 times, most recently from 4750711 to e830f6d Compare August 11, 2025 01:47
On arm64, GCC feels free to use floating point registers for essentially
anything unless we build with -mgeneral-regs-only. After the FPU gets used
in an interrupt handler, interrupts are disabled as there's no place to
save the registers during a nested exception. As the C library may be built
separately without this flag, we cannot use any of its functions or risk
having nested exceptions fail.

Switch printk usage to k_str_out and stick to (mostly) Zephyr internal
functions to ensure nested interrupts work correctly.

Signed-off-by: Keith Packard <[email protected]>
GCC 14 takes a look these functions which are just 'return true' and
inlines them even though they has the noinline attribute set. This happens
because the compiler computes the possible range of values from the
function call, and as that is a single value (true), it replaces the call
with that value. So it's not strictly inlining the function?

Insist a bit harder by adding a compiler_barrier to the functions which
seems to solve the issue.

Signed-off-by: Keith Packard <[email protected]>
…stems

RX consistently fails this test by a tiny amount. Loosen the tolerance to
let it work.

Signed-off-by: Keith Packard <[email protected]>
The compiler may want to know the desired optimization level during
linking, as when the compiler multilib configuration includes -Os as a
selector.

Do this by adding a new (optional) linker function,
toolchain_linker_add_compiler_options, which maps compiler options to
equivalent linker options, discarding any that aren't applicable.

Linker configurations which use the compiler driver (ld, lld, and xt-ld)
apply all provided compiler options. Linkers which don't provide this
function fall back to an implementation which simply discards all options.

Signed-off-by: Keith Packard <[email protected]>
With inclusion of the optimization flag into the multilib selection
process, we cannot compute the compiler library path when the compiler's
target.cmake is processed as OPTIMIZATION_FLAG is not computed until much
later.

Instead, add a function (compiler_file_path) which can be used to locate
the appropriate crtbegin.o and crtend.o files.

Delay computation of lib_include_dir and rt_library until after all
compiler flags have been computed by adding compiler_set_linker_properties
and calling that just before toolchain_linker_finalize is invoked.

Place default implementations of both of these functions in a new file,
cmake/compiler/target_template.cmake, where we assume the compiler works
like gcc or clang and handlers the --print-file-name and
--print-libgcc-file-name options. Compilers needing alternate
implementations can override these functions in their target.cmake files.

These implementations require that no generator expressions are necessary
for the compiler to compute the right library paths.

This mechanism is also used to take any additional compiler options and
pass them to the linker using toolchain_linker_add_compiler_options.

Signed-off-by: Keith Packard <[email protected]>
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I've split this into a bunch of separate PRs so that the individual module updates can be reviewed and merged separately.

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area: ADC Analog-to-Digital Converter (ADC) area: Build System area: C Library C Standard Library area: C++ area: CMSIS-DSP area: Toolchains Toolchains area: X86 x86 Architecture (32-bit) DNM (manifest) This PR should not be merged (controlled by action-manifest) manifest manifest-cmsis-dsp manifest-hal_silabs manifest-mbedtls manifest-psa-arch-tests platform: Intel ADSP Intel Audio platforms platform: Silabs Silicon Labs platform: STM32 ST Micro STM32
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6 participants